Patent · US Expired

Programmable interconnection chip for computer system functional modules

US4807183A · kind A · utility

149Cited by
4References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 23, 1988
Grant dateFeb 21, 1989
Priority date
Expiry dateJun 23, 2008

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/331
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The interconnection chip of the present invention is a custom chip which is designed to serve as an efficient link between system functional modules, such as arithmetic units, register files and input/output ports. The chip includes a crossbar interconnection, a FIFO or programmable delay for each of its inputs and a pipeline register file for each of its outputs. By using pre-stored control patterns, the chip can configure its crossbar and delays while performing other operations. Therefore, the usual functions of busses and register files can be realized with this single chip. Various embodiments and applications for the chip are disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.