Process for the stabilization of PN junctions
US4808542A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 1987 |
| Grant date | Feb 28, 1989 |
| Priority date | — |
| Expiry date | Aug 10, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02337
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a process for the stabilization of a PN junction an oxide layer (12) is produced on a semiconductor substrate (11), and above this layer a nitride layer (13) is also produced. The oxide layer (12) is wet-chemically etched following the formation and etching of the nitride layer (13). Following the wet chemical etching of the oxide layer (12), the overlapping nitride (13) is re-etched. Dopant implantation takes place in the wet-chemically-etched region. This then is followed by a diffusion. A process of this type achieves high electrical stability for an electronic component. Thereupon, the photoresist (14) or any other type of layer covering the nitride (13) is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.