High order digital phase-locked loop system
US4808884A · kind A · utility
54Cited by
22References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 2, 1985 |
| Grant date | Feb 28, 1989 |
| Priority date | — |
| Expiry date | Dec 2, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0331
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A digital data separator operates to separate data pulses from clock pulses in MFM encoded signals read from a magnetic disk system. The data separator includes a digital phase-locked loop system incorporating a variable length shift register which functions as a variable oscillator and programmed state machines which control the operation of the shift register and provides filtering functions. The state machines filter high frequency noise components from the incoming data signals and enables the system to accurately track frequency variations in the data stream while providing high tolerance to high frequency noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.