Graphics display system with memory array access
US4808986A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 1987 |
| Grant date | Feb 28, 1989 |
| Priority date | — |
| Expiry date | Feb 12, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/393
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A graphics display system including a circuit that receives graphics information to be displayed and a memory that stores the graphics information in a memory array that includes a portion that directly corresponds to the image area for display. The memory provides a single access operation to the array during a single memory cycle. Circuitry is provided that is connected to the receiving means and to the memory that provides graphics information to an N by M portion of the memory array during a single memory cycle (wherein N and M are integers each greater than one). A display is connected to the memory that displays the graphics information contained in the image area array portion of the memory. The graphics display system further includes the capability to provide a patterned line intersection where the continuity of the line pattern is maintained along the intersection of the lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.