Low power digital receiver
US4811362A · kind A · utility
125Cited by
26References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 15, 1987 |
| Grant date | Mar 7, 1989 |
| Priority date | — |
| Expiry date | Jun 15, 2007 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A low power digital receiver (10) is provided that contemporaneously selects the lowest possible sampling signal frequency (34) (from a plurality of available sampling signals), and received signal level (28) to properly digitize (32) and recover a desired signal. Digitization is performed after the first IF using broadband stages (28, 30, and 32) that are temporarily enabled (44) to rapidly digitize the first IF signal. This, together with the low sampling rate, minimizes the power consumption of the receiver (10) thereby permitting portable and mobile digital receiver embodiments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.