Phase locked loop circuit with quickly recoverable stability
US4812783A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 1987 |
| Grant date | Mar 14, 1989 |
| Priority date | — |
| Expiry date | Aug 24, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/956
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A PLL circuit for a phase comparator, a low-pass filter (LPF), a voltage-controlled oscillator (VCO) and a frequency divider. A first control circuit is responsive to a discontinuous phase change of a reference signal of the PLL circuit for inhibiting the operation of the phase comparator or disconnecting the LPF from the phase comparator during a predetermined period so that the discontinuous phase change information is not transmitted through the LPF to the VCO. At the same time, a second control circuit resets the frequency divider by a pulse of the reference signal after the discontinuous phase change or applies a voltage corresponding to the discontinuous phase change to the VCO so that the output signal of the frequency divider is locked in phase to the reference signal after the discontinuous phase change. With the cooperation of the first and second control circuits, the PLL circuit quickly recovers its stable state after the discontinuous phase change of the reference signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.