Charge pump circuitry having low saturation voltage and current-limited switch
US4812961A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 1987 |
| Grant date | Mar 14, 1989 |
| Priority date | — |
| Expiry date | May 15, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/009
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A charge pump circuit is integrated form utilizes a dual emitter transistor switch having low saturation voltage. The low saturation voltage for the transistor is provided by deriving a base bias voltage from the doubled voltage (2V.sub.cc) and a collector voltage from the voltage supply (V.sub.cc). Current-limiting for the transistor is provided by connecting one emitter to the base bias circuitry whereby the second emitter acts as a collector when the transistor saturates, thereby limiting the base drive and causing current-limiting.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.