Address translation unit
US4812969A · kind A · utility
23Cited by
7References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 22, 1986 |
| Grant date | Mar 14, 1989 |
| Priority date | — |
| Expiry date | May 22, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1036
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An address translation unit for use in a computer system having a multi-virtual space comprises a full associative translation lookaside buffer (TLB) which includes, for each entry, an associative memory array which stores and compares addresses. The associative memory array is provided with a circuit which, when a specific value is set in a common area field, invalidates comparison in a space number field.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.