Gain control circuit of current mirror circuit type
US4814724A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 13, 1987 |
| Grant date | Mar 21, 1989 |
| Priority date | — |
| Expiry date | Jul 13, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G3/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A gain control circuit of the current mirror circuit type in which a current source for a first current mirror circuit is constituted with the output stage of another current mirror circuit. Among the junctions of the first current mirror circuit and the another current mirror circuit, the bias side junction of the first current mirror circuit is used as an input terminal and the other as an output terminal. A predetermined current is supplied to a resistor connected to the emitter of the bias side transistor of the first current mirror circuit to obtain a predetermined gain. Application of a signal to the resistor, which signal is opposite in phase to an input signal, serves to cancel the influence of the input signal to thereby eliminate fluctuations in the gain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.