Concurrent hypercube system with improved message passing
US4814980A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 1986 |
| Grant date | Mar 21, 1989 |
| Priority date | — |
| Expiry date | Apr 1, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17368
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A network of microprocessors, or nodes, are interconnected in an n-dimensional cube having bidirectional communication links along the edges of the n-dimensional cube. Each node's processor network includes an I/O subprocessor dedicated to controlling communication of message packets along a bidirectional communication link with each end thereof terminating at an I/O controlled transceiver. Transmit data lines are directly connected from a local FIFO through each node's communication link transceiver. Status and control signals from the neighboring nodes are delivered over supervisory lines to inform the local node that the neighbor node's FIFO is empty and the bidirectional link between the two nodes is idle for data communication. A clocking line between neighbors, clocks a message into an empty FIFO at a neighbor's node and vica versa. Either neighbor may acquire control over the bidirectional communication link at any time, and thus each node has circuitry for checking whether or not the communication link is busy or idle, and whether or not the receive FIFO is empty. Likewise, each node can empty its own FIFO and in turn deliver a status signal to a neighboring node indicating…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.