Pixel interpolation circuitry as for a video signal processor
US4816913A · kind A · utility
36Cited by
13References
5Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 16, 1987 |
| Grant date | Mar 28, 1989 |
| Priority date | — |
| Expiry date | Nov 16, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/17
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A processor for expanding a compressed video signal includes a pixel interpolator which interpolates between input pixel values in two dimensions. This interpolator calculates and stores intermediate pixel values which are interpolated in the vertical direction. A pair of these intermediate pixel values are then fed back into the interpolator which performs a horizontal interpolation to produce pixel values that are interpolated in both the horizontal and vertical dimensions. In steady state operation, the horizontal and vertical interpolation operations are alternated to produce a stream of two-dimensionally interpolated values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.