Expandable multi-port random access memory
US4817051A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 2, 1987 |
| Grant date | Mar 28, 1989 |
| Priority date | — |
| Expiry date | Jul 2, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bipolar RAM circuit that can be expanded to provide as many ports as desired has separate read and write ports. Each read port comprises two transistors whose collectors are respectively connected to bit lines for that port and whose emitters are commonly connected to a word line. Each write port comprises a pair of transistors whose collectors are respectively connected to the data latch within the cell, whose bases are tied to a pair of bit lines and whose emitters are connected in common to a word line for that write port. To write information into the cell, current is either steered from a standby current path to a desired word line, or a larger write current is steered to the selected word line, causing the data in the cell to be determined by the differential voltage present on the bit lines for the write port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.