Semiconductor memory device having improved precharge scheme
US4817057A · kind A · utility
19Cited by
4References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 17, 1987 |
| Grant date | Mar 28, 1989 |
| Priority date | — |
| Expiry date | Feb 17, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device provided with an improved precharge scheme for bit lines is disclosed. A plurality of bit lines are divided into a plurality of bit line group and a precharge control signal is applied only to precharge transistors in a selected bit line group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.