Semiconductor device
US4819037A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 1987 |
| Grant date | Apr 4, 1989 |
| Priority date | — |
| Expiry date | Jun 3, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76289
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a semiconductor device having mainly vertical semiconductor elements, a plurality of semiconductor elements are formed in spaced relationship from each other on an insulation layer formed on a substrate and therefore completed isolated electrically from each other. A plurality of semiconductor intermetallic compound layers used as electrodes are formed independently in the same spaced relationship as the semiconductor elements for the respective semiconductor elements, making it possible to determine the potential for each semiconductor element as desired. Both N-type DMOS and P-type DMOS or the like can thus be formed on a single seminconductor single crystal substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.