Vertical type MOS transistor and its chip
US4819044A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 6, 1986 |
| Grant date | Apr 4, 1989 |
| Priority date | — |
| Expiry date | Feb 6, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
A vertical type MOS transistor and its chip comprise at least one MOS transistor portion consisting of a semiconductor layer having at least a first P-N junction, sandwiched by a source electrode through an insulating layer and a drain electrode, and a Zener diode portion having a second P-N junction formed in parallel with and adjacent to the MOS transistor portion in said semiconductor layer, the conductive level of said second P-N junction of the diode portion being lower than that of the first P-N junction of the transistor portion. With this construction, when a large surge voltage above a predetermined breakdown point of the Zener diode portion is applied to the source and drain electrodes, the Zener diode portion is first rendered conductive and any breakdown of the MOS transistor portion can be prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.