Loop filter for frequency multiplying phase locked loop
US4829268A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 1988 |
| Grant date | May 9, 1989 |
| Priority date | — |
| Expiry date | May 12, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/183
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A loop filter for a phase locked loop system having a voltage controlled oscillator (VCO), a divide-by-N circuit responsive to the output of the VCO, and an edge sensitive phase/frequency comparator responsive to the output of the divide-by-N circuit and a reference timing signal for providing a first control signal when the output of the divide-by-N circuit lags the reference timing signal or a second control signal when the output of the divide-by-N circuit leads the reference signal. The loop filter specifically includes first and second capacitors serially coupled between an output node and a ground reference node, wherein the second capacitor is connected to the ground reference node and the output node provides a control voltage to the VCO. A first current source is controllably connected by a first switch to the output node in response to the first control signal, whereby the first current source charges the first and second serially coupled capacitors. A second current source is controllably connected by a second switch to the output node in response to the second control signal, whereby the second current source discharges the first and second serially coupled capacitors. …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.