Control of multiple processors executing in parallel regions
US4829422A · kind A · utility
23Cited by
14References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 2, 1987 |
| Grant date | May 9, 1989 |
| Priority date | — |
| Expiry date | Apr 2, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30138
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Multiple processors are enabled to regulate their work within sections of a machine instruction sequence by storing status information about the state of execution of the parallel regions by the processors, and including, in the machine instruction sequence, parallel control instructions which enable each processor to proceed from section to section on the basis of the status information, without interrupting the execution of the machine instruction sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.