PSK modem system having improved demodulation reliability
US4829542A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 10, 1987 |
| Grant date | May 9, 1989 |
| Priority date | — |
| Expiry date | Jul 10, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2085
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A modem system is disclosed which has improved reliability of detection of transmitted PSK data using a simple signal delay detection scheme. A transmission signal is produced in which repetitive digital time slots each contain phase encoded "mark" or "space" data. Each time slot includes a reference phase portion at at least one of a front and rear portion of the tome slot. The phase of the transmitted signal changes in the remaining portion of each time slot in accordance with applied digital data. For a "mark" data signal the phase changes from a reference phase in a first direction to predetermined phase in a first half of the remaining portion of the time slot, and then back to the reference phase before the end of the time slot. For a "space" data signal the phase changes from the reference value in a second direction opposite the first to another predetermined value in a first half of the remaining portion of the time slot, and then back to the reference phase before the end of the time slot. A simple delay detection demodulation system is used to recreate the original digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.