Merged multi-collector transistor
US4831281A · kind A · utility
6Cited by
15References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 2, 1984 |
| Grant date | May 16, 1989 |
| Priority date | — |
| Expiry date | Apr 2, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/137
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A laterally formed PNP transistor includes twenty-four approximately equal area emitters aligned in two rows in spaced relationship, each emitter being adjacent to another emitter and having for collectors formed thereabout to produce ninety-six collector outputs. Certain collectors between adjacent emitters and between rows are merged together with predetermined ones of the collectors associated with different emitter regions being interconnected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.