Information processing apparatus for determining sequence of parallel executing instructions in response to storage requirements thereof
US4831515A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Feb 10, 1986 |
| Grant date | May 16, 1989 |
| Priority date | — |
| Expiry date | Feb 10, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3824
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information processing apparatus for executing instructions in parallel includes circuitry which, when a first instruction requesting reading of an operand from a certain address of the main storage or buffer storage has been decoded, detects among instructions in execution the presence of a second instruction requesting writing of an operand held by a register such as a general-purpose register into that address of the main storage without implementing an operation on the operand. If the second instruction has been detected, the invention reads out an operand from the register specified for operand reading by said second instruction before operand writing into the main storage by the second instruction is completed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.