Low voltage power down logic control circuit
US4831595A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 6, 1987 |
| Grant date | May 16, 1989 |
| Priority date | — |
| Expiry date | May 6, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/141
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A power down logic control circuit employing a diode and a capacitor to develop a voltage from a main power supply which normally holds a transistor in an "off" state. Upon disconnection of the main supply, the transistor switches "on" and activates a second transistor. Upon activation, the second transistor produces an inhibit signal to tri-state memory control circuitry and thereby preserve the memory data during transition to standby memory power provided by a lithium battery.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.