Apparatus and technique for timing jitter cancellation in a data receiver
US4831637A · kind A · utility
11Cited by
10References
14Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Jun 19, 1984 |
| Grant date | May 16, 1989 |
| Priority date | — |
| Expiry date | Jun 19, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/3818
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A data receiver which includes a timing recovery circuit or periodically adjusting a timing signal used to control sampling of the received signal is arranged to reduce or eliminate phase jitter introduced as a result of the adjustments. Apparatus and a method are described for forming a correction factor which is a joint function of the timing adjustment increment and a previous correction factor. Typically, correction is accomplished by forming the complex product of the in-phase and quadrature-phase components of the received signal and the recursively updated correction factor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.