Compensation circuit for nullifying differential offset voltage and regulating common mode voltage of differential signals
US4833418A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 1988 |
| Grant date | May 23, 1989 |
| Priority date | — |
| Expiry date | Sep 1, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45212
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus for nullifying the differential output offset voltage between the outputs of a differential amplifier and for setting the DC levels of the outputs to a known reference voltage includes a circuit which cross-couples the opposing AC output signals to obtain only the DC components of each signal. The apparatus further includes a first operational amplifier to generate a compensation voltage from the DC components of the outputs of the differential amplifier proportional to the amount of offset between the DC components of the outputs of the differential amplifier. The compensation voltage is fed back to the offset control inputs of the differential amplifier to reduce the differential offset voltage to substantially zero volts. The apparatus further includes a dual voltage divider network having a second operational amplifier that supplies a variable reference voltage to one terminal of each leg of the voltage divider network. The outputs of the differential amplifier each provided to a respective other terminal of the dual voltage divider network. The second operational amplifier has a reference voltage on one of its inputs. A signal responsive to the common mode output …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.