High-speed analog multiplier--absolute value detector
US4833639A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 1987 |
| Grant date | May 23, 1989 |
| Priority date | — |
| Expiry date | Dec 28, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06G7/16
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high-speed analog multiplier circuit for multiplying two analog inputs comprises a signum generator having an X input multiplier and having an output connected to a high-speed electronic switch. A Y analog input multiplicand is also connected to the high-speed electronic switch and the output of the electronic switch is connected to a differential amplifier of the type having a positive input, a negative input and a resultant output for producing the signum function (X) times Y. The electronic switch is operated by the signum generator so that the presence of a high Q output from the signum generator is effective to connect the Y multiplicand input to the positive input of the differential amplifier and that the presence of a high Q input from the signum generator is effective to connect the Y multiplicand input to the negative input of the differential amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.