Decoupling apparatus for use with integrated circuit tester
US4835464A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 1988 |
| Grant date | May 30, 1989 |
| Priority date | — |
| Expiry date | Jan 14, 2008 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S439/912
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus for decoupling one contact (40) of an integrated circuit device (12) from a primary power source provided by a tester. The apparatus includes a rack mount (58) applied over each of two pluralities of probe fingers (16) which, together with other structure, provide electronic communication between the contacts (40) of the device (12) being tested and the primary power soruce. Each of the mounts (58) has a plurality of recesses (60) formed therein for receipt of various chip capacitors (92) and shorting elements (94). The recesses (60) pass fully through their respective rack mounts (58), and a contact strip (78) is positioned in an overlying relationship to a corresponding rack mount (58) to secure the chip capacitors (92) and shorting elements (94), selectively inserted into the various recesses (60), in operative electronic engagement with probe fingers (16) corresponding to the recesses (60) in which the various capacitors (92) and shorting elements (94) are received. Projections (86) extending from the contract strips (78) are provided for this purpose. Electronic communication between the various pins (40) is completed by providing a decoupling strap (82) bridging …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.