Cache system adopting an LRU system, and magnetic disk controller incorporating it
US4835686A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | May 28, 1986 |
| Grant date | May 30, 1989 |
| Priority date | — |
| Expiry date | May 28, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/312
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache system employing an LRU (Least Recently Used) scheme in a replacement algorithm of cache blocks and comprising a directory memory whose entires have LRU counter fields, a host system issuing a read/write command to which an arbitrary LRU setting value is appended, a directory search circuit, and a microprocessor. The directory search circuit searches the directory memory in response to the read/write command issued from the host system. The microprocessor stores the LRU setting value appended to the read/write command in the LRU counter field of the hit entry of the directory memory or of the entry corresponding to the replacement target cache block, in response to the search result of the directory search circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.