Controlling asynchronously operating peripherals
US4837680A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 1987 |
| Grant date | Jun 6, 1989 |
| Priority date | — |
| Expiry date | Aug 28, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A plurality of host processors share access to a peripheral data storage subsystem and each have program means for controlling asynchronous operations of the subsystem. Control blocks in each of the host processors are addressably linked together for enabling inferred access to a unit control block (UCB) for any of a plurality of peripheral devices in the subsystem. The subsystem selectively groups some of the devices such that only devices designated as primary devices are addressably accessible by host processor application programs. Other devices in the respective groups are secondary devices and are accessed by the subsystem whenever the primary devices in the same group cannot perform a host processor commanded operation. Means are provided for identifying the secondary devices to all of the host processors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.