Optical arithmetic logic using the modified signed-digit redundant number representation
US4838646A · kind A · utility
6Cited by
3References
49Claims
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Key dates
| Filing date | Dec 29, 1986 |
| Grant date | Jun 13, 1989 |
| Priority date | — |
| Expiry date | Dec 29, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06E1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Optical architectures are presented for performing fully parallel, carry-free computation with a trinary, modified signal-digit number representation to allow addition, subtraction and multiplication. Two different optical schemes involving position and polarization encoding enable the fabrication of modular trinary logic systems that accommodate trinary numbers of different magnitudes. The optical systems made up of redundant three-dimensional modules provide a designer with latitude to simultaneously carry out addition, subtraction or multiplication optically and with reduced complexity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.