Architecture for block processing computer system
US4839801A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 3, 1986 |
| Grant date | Jun 13, 1989 |
| Priority date | — |
| Expiry date | Nov 3, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8092
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A block processing computing system includes a decomposition unit, a control circuit, a system memory, a data block path and a block processor. The decomposition unit receives externally-supplied primitive command packets and decomposes the primitive into machine language operations on computational blocks of data. The control circuitry generates control and address signals for performing the machine level operations. The data block path includes alignment circuitry for selecting data from burst-accessed blocks of data and a macropipeline for controllably storing and transferring blocks of data to and from the block processor. The block processor has interchangeable, double-buffered local zone memories and a parallel set of pipelined vector processors for performing block operations on computational blocks of data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.