Method and apparatus for testing three state drivers
US4841232A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 1988 |
| Grant date | Jun 20, 1989 |
| Priority date | — |
| Expiry date | Apr 29, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0754
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an integrated circuit chip utilizing CMOS technology, an embedded data bus is driven by embedded three state drivers, and the bus is in turn connected to provide a drive signal to embedded receivers and similar logic devices. An embedded threshold detector is provided to detect the occurrence of any invalid data signal (i.e. a non-"0" or a non-"1" signal level) on the data bus. The threshold detector's output signal is connected to off chip terminal means, to thereby enable off chip monitoring of the bus signal. The threshold detector's output signal is also ANDed with the bus signal, to thereby prevent the application of a potentially destructive invalid bus signal to the receivers and the like. Terminator circuit means provides a known invalid signal state on the bus when the bus is in its high impedance state due to all of the three state drivers being disabled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.