CMOS precision gain amplifier
US4841254A · kind A · utility
3Cited by
0References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 29, 1987 |
| Grant date | Jun 20, 1989 |
| Priority date | — |
| Expiry date | May 29, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G1/007
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A precision gain circuit arrangement for amplifying analog type signals is fabricated on an integrated chip with digital devices in a CMOS process. The circuit arrangement includes a high gain operational amplifier with a series connected pair of FET devices setting a reference voltage (V.sub.ref) at the inverting input of the operational amplifier and a feedback circuit including a parallel connected pair of FET devices and a biasing FET for said pair set the gain of said circuit arrangement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.