Bit pattern conversion system
US4841298A · kind A · utility
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4References
8Claims
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Key dates
| Filing date | Dec 14, 1987 |
| Grant date | Jun 20, 1989 |
| Priority date | — |
| Expiry date | Dec 14, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bit pattern conversion system for converting a sequence of a bit pattern between a central processing unit and a peripheral circuit, including a data bus line connected between the central processing unit and the peripheral circuit, and a conversion circuit provided in the peripheral circuit for converting the sequence of the bit pattern from a most significant bit to a least significant bit, and vice versa, in accordance with a conversion signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.