Controlled CMOS substrate voltage generator

US4843256A · kind A · utility

Assignee

• Jenoptik Jena GmbH · DE

Inventors

• Andreas Scade · Dresden, DE
• Reinhard Hoenig · Dresden, DE
• Horst-Guenther Schniek · Dresden, DE

Key dates

• Filing date: Nov 13, 1987
• Grant date: Jun 27, 1989
• Expiry date: Nov 13, 2007

Classification

• Technology area (CPC G): Physics
• CPC primary: G05F3/205
• WIPO field: Control
• WIPO sector: Instruments

Abstract

A controlled CMOS substrate voltage generator generates a rectangular wave pulse which is supplied to the pumping circuit by a pumping capacitor and controlled decoupling members. At the same time the decoupling members are activated by a control circuit and are completely opened, so that the full pumping lift is completely utilized without reduction due to threshold voltages. In order to reduce the injection of charge carriers of nCMOS decoupling members, inversely activated pMOS decoupling members, which are strongly conducting at low substrate bias voltage near 0V, are connected in parallel to the latter. To increase performance, the circuit is designed as a circuit in phase opposition. Improved sensors are provided, which during the active phase maintain the shift of the substrate voltage produced upon wobble of the bit strings toward more negative values by alternation of the reference voltage of the sensor.