Method for memorizing a data bit in an integrated mos-type static random access memory cell, a transistor for performing the method, and and the memory so obtained
US4843442A · kind A · utility
4Cited by
3References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 29, 1987 |
| Grant date | Jun 27, 1989 |
| Priority date | — |
| Expiry date | Jul 29, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for memorizing a data bit in an integrated static MOS-type RAM, a transistor for performing the method, and a memory produced by the method are described. An MOS transistor with a weakly doped channel has a hysteresis phenomenon with subthreshold conduction. The transistor is advantageously used as a memory element in an integrated static RAM cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.