Method for making folded extended window field effect transistor
US4844776A · kind A · utility
31Cited by
2References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 4, 1987 |
| Grant date | Jul 4, 1989 |
| Priority date | — |
| Expiry date | Dec 4, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76895
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A gate electrode having an insulating top layer as well as insulating sidewall spacers permits the source and drain regions to be electrically contacted through windows directly above the source and drain regions formed in a window pad layer. The window pad layer may also be used as a sublevel interconnect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.