Method and apparatus for data exchange between microprocessors
US4845667A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 1988 |
| Grant date | Jul 4, 1989 |
| Priority date | — |
| Expiry date | Sep 22, 2008 |
Classification
- Technology area (CPC F)Mechanical Engineering; Lighting; Heating
- CPC primaryF02D41/266
- WIPO fieldEngines, pumps, turbines
- WIPO sectorMechanical engineering
Abstract
A method and apparatus for data exchange between a master microprocessor and a slave microprocessor, in which the connection is a parallel bus and the data exchange requires a minimum of time. For this purpose, the data are transmitted in a predetermined sequence and in which the transmission-start identifier is a signal train generated by the master processor which is specifically associated with data transmission. Preferably, a master processor and a slave processor are interconnected by the parallel data bus, with buffer memories, such as latches, interposed. A toggle flip-flop is connected to the interrupt input of the slave processor in such a way that merely placing a specific instruction (i.e. command+data) on the bus simultaneously notifies the slave processor to prepare for the exchange of data, thereby saving time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.