Patent · US Expired

Non-clocked static memory cell

US4845676A · kind A · utility

8Cited by

6References

17Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Wolf-Dieter Lohlein · Herrenberg, DE
Helmut Schettler · Waldenbuch, DE
Otto Wagner · Edenkoben, DE

Key dates

Filing date	Feb 13, 1987
Grant date	Jul 4, 1989
Priority date	—
Expiry date	Feb 13, 2007

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/412
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A static memory cell comprising a pair of cross-coupled transistors and a bit line driver/isolation stage configured as an inverter disposed between one node of the cross-coupled transistors and a read-select transistor. The cell is accessed through a bus which includes a read bit line and a write bit line, the word line being divided into a write word line and a read word line.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.