Thermal expansion mismatch forgivable printed wiring board for ceramic leadless chip carrier
US4847136A · kind A · utility
46Cited by
4References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 21, 1988 |
| Grant date | Jul 11, 1989 |
| Priority date | — |
| Expiry date | Mar 21, 2008 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/31721
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A modified printed wiring board for reducing the cracking of solder joints used to attach ceramic leadless chip carriers to the surface of the printed wiring board. A relatively thin expansion layer is provided on top of the conventional printed wiring board. This expansion layer is bonded to the printed wiring board except at locations underneath the footprint of the chip carrier and solder joints. This expansion layer reduces the stress of solder joints between the ceramic leadless chip carrier and the printed wiring board due to thermal expansion mismatch, thereby reducing cracking of the solder joint.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.