Analog-to-digital conversion circuit
US4851842A · kind A · utility
Inventor
Key dates
| Filing date | Jun 30, 1988 |
| Grant date | Jul 25, 1989 |
| Priority date | — |
| Expiry date | Jun 30, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/46
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital conversion circuit comprises a level detection circuit for detecting the level of an analog input, an amplifier for amplifying the analog input with its amplification degree increased when the detected level is smaller than a predetermined level and decreased when the detected level is larger than a predetermined level, an analog-to-digital converter for analog-to-digital converting the output the amplifier and an attenuator provided in a posterior stage of the analog-to-digital converter for attenuating the digital output of the analog-to-digital converter in association with the amplification degree of the amplifier to maintain a total gain between the analog input and the digital output substantially constant irrespective of the level of the input signal. According to the invention, an analog input is amplified by the amplifier before A/D conversion with amplification degree determined in accordance with the level of the analog input detected by the level detection circuit and the signal is attenuated after the A/D conversion in association with the amplification degree whereby the analog-to-digital converter can be utilized efficiently to higher order bits …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.