Data carrier arrangement having an integrated circuit
US4853526A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 26, 1987 |
| Grant date | Aug 1, 1989 |
| Priority date | — |
| Expiry date | Oct 26, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG07F7/02
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
The present invention relates to a data carrier arrangement having an integrated circuit (1) for obtaining of services, goods or the like, the integrated circuit (1) having at least one non-volatile data memory (2) with a predetermined number of memory cells which are readable, erasable and writable. In the data carrier arrangement described, the integrated circuit (1) has along with the data memory (2) a counter (3) consisting of a plurality of stages, and a control and security logic (4), the counter (3) being operable only in one predetermined direction, the size of the data memory (2) being selected such that its memory cells are adapted to the steps of the counter, and the control and security logic (4) controlling, among other things, the data transfer between the memory (2) and the counter (3) in such a way that before each use of the data carrier the current memory value is transferred to the counter and after use of the data carrier the memory content is updated with the new counter reading.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.