Vector processor
US4853890A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 1983 |
| Grant date | Aug 1, 1989 |
| Priority date | — |
| Expiry date | Apr 15, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8084
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a vector processor including pipeline processors and means for synchronously controlling each component, there is provided an FIFO memory for temporarily storing the output of each pipeline processor and for outputting the stored data, in the order of storing, to at least one of the pipeline processors. Since intermediate result of operation is temporarily stored in the FIFO memory, a simple microprogram can be used and thus the capacity of the memory for microprogram can be reduced even if the successive intermediate results for calculation of vector elements are overlapped within the loop of the microprogram.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.