Bipolar ram having state dependent write current
US4853898A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 1988 |
| Grant date | Aug 1, 1989 |
| Priority date | — |
| Expiry date | Feb 11, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4116
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bipolar RAM having improved read and write cycle times. During a write operation, the state of a selected memory cell is sensed by read/write current controller circuits. A high write current is selected if the data to be written requires a shift of the memory state of the memory cell, and a low write current is selected if the data to be written corresponds to the present memory state of the memory cell. This improves the write cycle time by reducing saturation of the memory cell. If a long write signal is impressed on the RAM, the read/write current controller circuit terminates the high level write current after the memory cell has shifted its memory state. When a memory cell is being selected for a read or write operation, the write current select circuit discharges the bit line attached to the low voltage side of the selected memory cell, improving the read cycle time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.