Bonding technique to join two or more silicon wafers
US4854986A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 13, 1987 |
| Grant date | Aug 8, 1989 |
| Priority date | — |
| Expiry date | May 13, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/187
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing semiconductors formed of bonded wafers. The method includes the use of a heat sink. The heat sink induces a temperature gradient to occur on a single area at the interface of the wafers with the gradient moving rapidly across the remaining surface. As a result of the temperature front, the voids or uncontacted areas between the wafers which result in a typical bonding process are substantially reduced, thereby providing a stronger and more effective bond.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.