Time division multiplex arrangement
US4855996A · kind A · utility
Assignees
Inventor
Key dates
| Filing date | Aug 3, 1988 |
| Grant date | Aug 8, 1989 |
| Priority date | — |
| Expiry date | Aug 3, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/1629
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Modems, data service units, application modules and other data communication devices, installed in a common equipment cabinet, are interconnected by way of a time division multiplexed bus. Time slots assigned to the various devices recur at a number of regularly-spaced access periods across each time division multiplex frame. The rate at which the access periods occur and the total number of access periods that make up each frame are chosen in such a way as to accommodate a mix of devices having respective bus access rates wherein there is at least one pair of rates for which neither rate of the pair is a whole number multiple of the other. The process of allocating access periods to the time slots is carried out using a known lemma to identify linear Diophantine equation solutions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.