Microprocessor based BCH decoder
US4856004A · kind A · utility
8Cited by
8References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 5, 1987 |
| Grant date | Aug 8, 1989 |
| Priority date | — |
| Expiry date | Oct 5, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/151
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A microprocessor based system which implements BCH decoder algorithms in a sufficiently efficient manner to allow real time BCH decoding of a BCH(255,131) code is disclosed. Table lookup operations utilizing successive M-bit serial portions of BCH encoded input data as table offsets permit the microprocessor to generate syndrome using M-bit parallel portions of the input data. Additional table lookup operations which utilize tables stored in ROM memory speed execution time of multiply operations and detection of roots for inverse error location polynomials.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.