Binary coding circuit for OCR
US4856076A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 7, 1987 |
| Grant date | Aug 8, 1989 |
| Priority date | — |
| Expiry date | Jul 7, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V30/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This invention provides a binary coding circuit particularly suited for use in an optical character reader which "reads" characters or symbols using a photoelectric conversion cell. A delay circuit has one input for receiving an output of the photoelectric conversion cell, and at least three separate and distinct delayed outputs providing respective delays that are different from each other. A threshold determining circuit is arranged so that when one of the delayed outputs is selected to be a binary-coding target signal, the threshold determining circuit receives as its inputs a plurality of ones of the delayed outputs including one delayed output having a larger delay time than that of the binary-coding target signal and one delayed output having a smaller delay time than that of the binary-coding target signal, so as to produce a threshold signal at a value which is the greater of the delayed signals. A comparator circuit receives at a first input thereof the binary-coding target signal and receives at a second input thereof the threshold signal. It compares the binary-coding target signal with the threshold signal to thereby produce a binary signal of the appropriate level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.