Differential offset corrected current mirror
US4857725A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 1988 |
| Grant date | Aug 15, 1989 |
| Priority date | — |
| Expiry date | Jul 6, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/303
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A current mirror circuit 10 is coupled to a first and a second photodetector 18 and 20 and differentially couples together the two photodetectors to an amplifier 12 such that a resulting differential output current is independent of the intrinsic responsivity difference between the two photodetectors. The circuit includes a first transistor 14 having an input terminal coupled to an output terminal of the first photodetector and a second transistor 16 having an input terminal coupled to an output terminal of the second photodetector. A capacitance 22 is coupled between a control terminal of the first transistor and a control terminal of the second transistor, the control terminal of the first transistor further being coupled to the input terminal of the first transistor. A first switch 24 is coupled between the control terminal of the second transistor and the input terminal of the second transistor. A second switch 26 is coupled between the second transistor input terminal and an input of the transimpedance amplifier for coupling the output current signal to the transimpedance amplifier. Preferrably the transistors are MOSFETs operated in subthreshold. During calibration the first …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.