Method of producing the gate electrode of a field effect transistor
US4859618A · kind A · utility
27Cited by
6References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 19, 1987 |
| Grant date | Aug 22, 1989 |
| Priority date | — |
| Expiry date | Nov 19, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28587
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a self-aligned gate electrode of a field effect transistor, in which a resist pattern is formed on a substrate by lithography, an ion-implanted layer in the substrate at the side of the resist is formed by ion implantation, an insulating film is formed on the substrate by electron cyclotron resonance plasma chemical vapor deposition, the resist pattern and a part of the insulating film on the resist pattern removed by lift-off to thereby form an insulating pattern with an opening, the substrate annealed to activate said ion-implanted layer and a gate electrode formed in the opening by a spacer lift-off method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.