Digital signal processing circuit driven by a switched clock and used in television receiver for processing standard and nonstandard television signals
US4860090A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 1988 |
| Grant date | Aug 22, 1989 |
| Priority date | — |
| Expiry date | Mar 7, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/641
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A digital television receiver includes a decision circuit for deciding whether an input television signal is a standard signal or a nonstandard signal. A first clock signal generator circuit for generating a first sampling clock signal synchronized with a color burst signal is provided in combination with a second clock signal generator circuit for generating a second sampling clock signal synchronized with a horizontal synchronizing signal. When the standard television signal is received, the television signal is processed by employing the first sampling clock signal. When the nonstandard television signal is received, the television signal is processed by employing the second sampling clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.