Electrically programmable non-volatile memory having sequentially deactivated write circuits
US4860258A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 1987 |
| Grant date | Aug 22, 1989 |
| Priority date | — |
| Expiry date | Oct 20, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electrically programmable non-volatile memory includes a matrix of memory cells accessible by rows and columns, write and read circuits which apply potentials, representing the programmed datum or representing the read command, to the rows and columns. The memory also includes a device which controls the interconnection of the write and read circuits with the memory cells, wherein N memory cells are programmed simultaneously, N being greater than 1, each memory cell setting up a current surge when it is programmed at "1". The memory also includes a device for deactivating, one by one, the write circuits corresponding to the N memory cells where there is a change-over from a programming mode to a read mode, and a structure to short-circuit the deactivation device at the change-over to the programming mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.